on-chip Variation ( -analysis_type on_chip_variation )

In the on-chip variation mode, IC Compiler perform a conservative analysis that allows both minimum and maximum delays to apply to different paths at the same time.
For a setup check, it uses maximum delays for the launch clock path and datapath and minimum delays for the capture clock path.
For a hold check, it uses minimum delays for the launch clock path and datapath and maximum delays for the capture clock path.

If you are performing simultaneous manimum and maximum timing analysis, the logic libraries specified by the link_library variable are used for both maximum and minimum timing information, unless you specify seperate minimum timing libraries by using the set_min_library cmd.
The set_min_library cmd associates a minimum timing library with a maximum timing library specified in the link_library variable.

For example,

icc_shell> set_app_var link_library " * maxlib.db"
icc_sehll> set_min_library maxlib.db -min_version minlib.db

to find out which libraries have been set to be the minimum and maximum libraries, use the list_libs cmd. In the generated report, a lowercase letter "m" appears next to the minimum library and an uppercase letter "M" appears next to the maximum library.