VLSI Physical Design

Saturday, September 17, 2016

Clock Tree Synthesis CTS

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What is CTS? Process of balancing clock skew and Minimizing Insertion Delay in order to meet timing , power requirements and other requi...
4 comments:

MCMM: Multi-Corner Multi-Mod

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What's MCMM MCMM stands for: Multi-Corner Multi-Mode (static timing analysis ) What's a Mode A mode is defined by a set ...
Friday, September 16, 2016

Congestion

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Congestion needs to be analyzed after placement and the routing results depend on how congested your design is. Routing congestion may be l...
2 comments:
Sunday, August 28, 2016

Antenna effect

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The antenna effect [plasma induced gate oxide damage] is an effect that can potentially cause yield and reliability problems during the man...

Aspect Ratio of Core/Block/Design

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The Aspect Ratio of Core/Block/Design is given as:   The aspect ratios of different core shapes are given in below : The Role...

NON Default Rule: NDR Rules

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NONDEFAULT rule. This is a routing  rule that  is, well, not the default! It usually consists of  double -wide or triple-wide metal, and a...
1 comment:
Wednesday, August 24, 2016

difference between crosstalk noise and crosstalk delay

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\Noise:  The term “noise” in electronic design generally means any undesirable deviation in voltage of a net that ought to have a constant ...
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Xz VLSI
I share my notes for learning Backend VLSI. If you have any questions or thoughts, please feel free to let me know. I work as a Physical Design Engineer. Contact: 88physicaldesign@gmail.com
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