General MOSFET at submicron level is suffering from several submicron issues like short channel effects, threshold voltage variation etc. FinFET is supposed to overcome the short channel effects. Structure of of FinFET is shown in below,
Conventional MOSFET manufacturing processes can also be used to fabricate FinFET.
FinFET provides better area efficiency compared to MOSFET.
mobiblity of the carriers can be improved by using FinFET process in conjunction with the strained silicon process.
FinFET device structure Silicon on Insulator (SOI) process is used to manufacture FinFET. A single poly silicon layer is deposited over a fin. Thus poly silicon straddles the fin structure to form perfectly aligned gates. Here a fin itself acts as a channel and it terminates on both sides of source and drain. In general MOSFET device, over the si substrate poly silicon gate is formed. Poly silicon gate controls the channel. Straddling of poly silicon gate over the Si fin gives efficient gate controlled characteristics compared to MOSFET. Since gate straddles the fin the length of the channel is same as that of width of the fin. As there are two gates effectively around the fin we can write, width of the channel is equivalent to twice the height of the fin i.e. w=2*h. A term called *fin pitch* is used to define the space between two fins. Height of the FinFET is equivalent to width of the MOSET. If w is the fin pitch then to attain same area efficiency required fin height is w/2. But practical experiments have shown that fin height can be greater than w/2 for a fin pitch of w. thus FinFET achieves more area efficiency than MOSFET.
The basic electrical layout and the mode of operation of a FinFET does not differ from traditional field effect transistor. There is one source and one drain contact as well as a gate to control the current flow.
In contrast to planner MOSFETs the channel between source and drain is build as a three dimensional bar on a top of a silicon substrate , called fin. The gate electrode is then wrapped around the channel, so that there can be formed several gate electrodes on each side which leads to reduced leakage effects and an enhanced drive current.
FinFET Technology Consumption Market Report @ https://www.grandresearchstore.com/semiconductor-and-electronics/global-finfet-technology-2018-2023-806
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