Tuesday, November 24, 2015

Implementing Clock Meshes

Clock meshes are homogeneous shorted grids of metal that are driven by many clock drivers. The purpose of a clock mesh is to reduce clock skew in both nominal designs and designs across viriations such as on-chip variation (OCV) , chip-to-chip variation, and local power flutuations. A clock mesh reduces skew variation mainly by shorting the outputs of many clock drivers.

Clock Mesh Structure:


Above shows the structure of a clock mesh. The network of drivers from the clock port to the mesh driver inputs is called the premesh tree.  The network of shorted clock driver outputs is called the mesh.

Using the clock meshes provides the following benefits:
1) Small skew variation, especially for high-performance designs.
2)Consistent design performance across variations
3)Predicable results throughout both the design stage and ECO stage later.
4)Stability resulting from mesh grids being close to receivers

Using clock meshes has the following disadvantages:
1. More routing resources are required to create clock meshes.
2. Power consumption is higher during transition on parallel drivers driving the mesh.

Prerequisites for Creating Clock Meshes
Before you run clock mesh cmds, your design should meet the following requirements:
1) The design should be mesh-conducive.
A basic mesh-conducive design contains at least one high-fanout clock net that has no more than two levels below the proposed mesh. If necessary, you can use the remove_clock_gating cmd in Power Compiler or the faltten_clock_gating cmd in ICC to flatten the circuitry under the proposed mesh.
2) The design should have enough room to place mesh drivers near the mesh loads for driving the mesh optimally.
3)To analyze clock mesh circuits, you must have the NanoSim or HSIM transitor models for all the clock mesh gates. A circuit simulator is needed because static timing tools cannot handle clock meshes.
4) You should be able to run NanoSim from the shell where you invoke the ICC.

Creating H-, T-, or I-Shape Routes for Premesh Trees
The add_clock_drivers cmd can create a very regular premesh tree if you set the appropriate options, but the router cannot guarantee regular routes and low skew for the premesh tree.
You will get regular routes ad low skew if you choose the H-, L-, or T-shape route by using the route_htree cmd or by choosing Clock > Clock Mesh > Route HTree in the GUI.

For a net that has one driver and four loads , you can use the route_htree cmd to create an H-shape route. By default, the cmd enables Zroute to create H-, I-, or T-shapre routes.

For example, the following cmd uses Zroute to create an H-shape route by using the M7 metal layer for vertical wires and the M6 layer for horizontal wires. To ensure DRC convergence, Zroute might choose layers other than M6 and M7.

icc_shell> route_htree -nets [get_nets { ccc*L3_net* ccc*L2_net*}] \
           -layer {M6 M7} -orientation {H}

For a net that has noe driver and two loads, you can create an I-shape route. The following example shows how to create a rotated I-shape route:
icc_shell> route_htree -nets [get_nets { ccc*L1_net*}] \
          -layers {M6 M7} -orientation {I_90}

Both H- and I-shape routes produce low skew. Using a series of I-shape routes instead of H-shape routes requires more drivers but minimizes skew.

For a net that has one driver and three loads, you can use route_htree to create a T-shape route

H-tree Structure,



















Routing Clock Nets
After you complete the routing of mesh drivers and premesh trees, perform detail routing of the clock nets by using route_zrt_group -all_clock_nets -reuse_existing_global_route true cmd or choose
Route > Net Group Routing in the GUI.

1 comment:

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