clock overview

PT supports the following types of clock information:

Multiple clocks
  You can define multiple clocks that have different waveforms and frequencies. Clocks can have real sources in the design ( ports and pins ) or can be virtual. A virtual clock has no real source in the design itself.

Clock network delay and skew

Gated clocks

Generated clocks
 You can analyze a design that has generated clocks. A generated clock is a clock signal generated from another clock signal by a circuit within the design itself, such as a clock divider.

Clock transition times
   You can specify the transition times of clock signals at register clock pins.
the transition time is the amount of time it takes for the signal to change from one logic state to another.