what is clock latency?

what is clock latency and clock uncertainty?

___ Clock latency is defined as the amount of time from the clock origin point to the sync pin of the flop and uncertainty is jitter which is generated by the oscillator that is PLL.

___ Clock latency is the delay between the clock source and the clock pin. It is depended on hardware, PCB, traces, etc.

___Clock uncertainty is the difference between 2 clock signals. It could be the same clock signal arriving at two different points on a PCB ( skew).

___Clock latency is the delay in the clock signal from the clock source port to any clock pin in the circuit.  Clock uncertainty is jitter. But jitter and skew are two different terms.  Jitter is the variation i the clock period ( that is the clock edge might not be at the required time).

Jitter could be caused due to various on chip variations. Jitter need not be expressed with respect to two nodes.

Clock skew is the difference between the clock arrival times at two different nodes.