Constraints are type of restrictions:
So constraints are the instructions that the designer apply during various step in VLSI chip implementation, such as logic synthesis, clock tree synthesis, place and route, ans static timing analysis.
These are basically two types of design constraints:
Design Rule Constraints,
*Design Rule constraints are defined by the ASIC vendor in the technology library (library file *.lib) file (implicit constraints)
*You cannot discard or override these rules.
*You can apply more restrictive design rules, but you cannot apply less restrictive ones. This thing you can do with the help of optimization constraints.
*Design rules constrain the nets of a design but are associated with the pins of cells from a technology library.
*These constraints can be library specific ( common on all the cells defined in the library file) or maybe individual cell specific.
Optimization Constraints:
>Optimization constraints are explicit constraints ( set by the designer )
>They describe the design goals(area, timing , ans so on) the designer has set for the design.
>They must be realistic
Design Rule Constraints:
> Maximum transition time
*The transition time of a net is the longest time required for its driving pin to change logic values. Transition time is decided on the basic of rise time and fall time.
*This constraint (max_transition) is based on the library data.
DRV means max transition, max cap , max fanout violations.
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